Physical verification (PV)

Physical Verification/DFM support for Hard Macros and full-chip level
  • DRC/LVS/Antenna/Density checks.
Signoff timing conclusion with X-talk impacts, OCVs, and ECO's execution
  • Experience in utilizing NLDM/CCS timing models
  • Timing conclusion for Functional/Shift/Capture modes.
  • X-talk commotion and defer impact on planning.
Low Power Implementation for Static/Dynamic decreases
  • Dynamic power decreases utilizing clock gating/Retention rationale/Switch cells
  • Redhawk apparatus skill in IR Drop investigation.
  • Decap/TapCells/EndCap cells/Clamp cells addition and streamlining.
Amalgamation/Formal proportionality/UPF stream/CLP takes a look at help
  • Level/Hierarchical amalgamation approach.
  • Examine chain inclusion for further developing testability and test inclusion.
EDA/CAD stream and system support
  • Back-End stream advancement and backing
  • Framework organization with LSF/EOD/License the executives/apparatuses establishment support.